When converter modules, i.e. voltage source inverters or rectifiers, are paralleled via a sharing reactor, the different turn on and off delays, voltage rise/fall and on voltage drop of the semiconductors may introduce current divergence. If each converter device is of the same type, i.e. with the same gate drive circuit, this difference is relatively small as the tolerances are normally kept within a tight range with modern process control. To further balance current differences caused by variations within the tolerances, a closed-loop current sharing algorithm (active sharing) is normally used. There are two major active sharing approaches: (1) modification of the individual converter module voltage demand or (2) the output pulse width.
Taking active sharing based on modification of voltage demand as an example, the primary purpose is to take the 3 phase modulation set, Vabc, which the (network or generator) current controller has demanded, and produce several variations of this Vabc as outputs, where each output is then used to calculate the PWM edge times for an individual converter module. The difference between the input Vabc and each of the outputs is determined by the difference between the current feedbacks for that converter module, compared with the average current feedback. Thus, this technique is intended to provide a means of balancing the currents in each converter module, and should compensate for the natural unbalancing effects of variations of timings and impedances in each individual converter module. FIG. 1 shows a block diagram of a corresponding controller for one of the phases of a converter module.
A state of the art power unit (such as a 3 MW power unit for a wind power generator from Siemens Wind Power (SWP)) comprises five parallel converter modules. Each module contains the same IGBT module type and so the same semi-conductor variant. The above mentioned active sharing algorithm can improve the mis-share current from around 6% without active sharing to less than 3%. The mis-share current is the difference between the individual RMS current of one of the converter modules and the average current of all five modules. The SWP converter module is a two level voltage source converter using IGBTs with anti-parallel diodes as switching devices. Further details about the SWP power unit and converter module design can e.g. be found in the following paper: Jones, Rod; Waite, Philip (2011) “Optimised power converter for multi-MW direct drive permanent magnet wind turbines”, Proceedings of 14th EPE.
However, when the converter modules use different types of semiconductors and gate drive circuits, e.g. if one converter module of one type is replaced by a new converter module of another (e.g. newer) type or if converter modules originating from different suppliers are coupled in parallel, the non-linearity characteristics may be so different that the traditional active sharing algorithm cannot stably and effectively balance the currents. As a consequence, the total converter rating has to be degraded. Otherwise the converter may be thermally overloaded, resulting in reduced device life time or even damage. For example, if one SWP version 2 converter module was arranged in a parallel configuration with four version 1 modules within one SWP 3 MW power unit, then the mis-share would likely be around 15%. Consequently, a 15% de-rating of the power unit would have to be requested.
Accordingly, there may be a need for a way of reducing the mis-share current in a power unit comprising multiple converter modules of different types, such that the above-mentioned de-rating of the power unit can be avoided or at least significantly reduced.